智能手机等设备依靠分散的CPU、GPU、NPU、DSP和其他加速器来处理各种任务。 然而，这些专用核心经常处于闲置状态，导致功耗和硅面积的浪费。 一家初创公司希望通过一种统一的设计来解决这种低效问题，并将其恰当地称为"通用处理器"。

Hardware Acceleration and Reuse High-performance implementations of floating-point DSP algorithms in FPGAs require single-cycle parallel memory accesses and effective use of pipelined arithmetic ...

[Adam Taylor] always has interesting FPGA posts and his latest is no exception. He wanted to use a Zynq for image processing. Makes sense. You can do the high-speed parallel parts in the FPGA ...

Singular value decomposition (SVD) for an 8x8 matrix can run over 50 times faster in fixed-point arithmetic on an FPGA than a floating-point implementation running on a TI TMS320C67x DSP processor.